Amjad Gawanmeh

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SystemC is a system level language recently proposed to raise the abstraction level for embedded systems design and verification. We propose a verification methodology for SystemC designs based on a combination of static code analysis and SystemC semantics described with abstract state machines (ASM). We abstract the source SystemC design into hypergraphs(More)
—Fast Health Interoperable Resources (FHIR) is the recently proposed standard from HL7. Its distinguishing features include the user friendly implementation, support of built-in terminologies and for widely-used web standards. Given the safety-critical nature of FHIR, the rigorous analysis of e-health systems using the FHIR is a dire need since they are(More)
In this paper, we present a formal hardware verification framework linking ASM with MDG. ASM (Abstract State Machine) is a state based language for describing transition systems. MDG (Multiway Decision Graphs) provides symbolic representation of transition systems with support of abstract sorts and functions. We implemented a transformation tool that(More)
In this work we provide a methodology for the design and verification of a frequency domain equalizer. The performance analysis of the equalizer is conducted using two methods: simulation based verification in Simulink and System Generator and theorem proving techniques in Higher Order Logic. We conduct both floating-point and fixed-point error estimations(More)
We present a framework for the formal verification of Abstract State Machine (ASM) designs using the Multiway Decision Graphs (MDG) tool. ASM is a state based language for describing transition systems. MDG provides symbolic representation of transition systems with support of abstract sorts and functions. We implemented a transformation tool that(More)