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This paper describes the first integrated transversal filter for feed-forward equalizers (FFE) operating above 40 Gb/s. Equalization of a 2/sup 31/-1 PRBS over a 9-ft and 6.5-ft cable with SMA connectors is demonstrated on-wafer at 40 Gb/s and 49 Gb/s respectively. The circuit is implemented in a commercial 0.18 /spl mu/m SiGe BiCMOS process and is based on(More)
—This paper describes the first integrated transversal filter for feed-forward equalizers (FFE) operating above 40 Gb/s. Equalization of a 2 31 −1 PRBS over a 9-ft and 6.5-ft cable with SMA connectors is demonstrated on-wafer at 40 Gb/s and 49 Gb/s respectively. The circuit is implemented in a commercial 0.18 µm SiGe BiCMOS process and is based on a(More)
This paper presents an analysis of sub-2.5-V topologies and design methodologies for SiGe BiCMOS and sub-90nm CMOS building blocks to be used in the next generation of 40-100 Gb/s wireline transceivers. Examples of optimal designs for 40-80Gb/s broadband low-noise input comparators, low-voltage high-speed MOS- and BiCMOS CML logic gates, 30-100 GHz(More)
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