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An adaptation of the Ant Colony Optimization technique to the optimal sizing of analog circuits is presented. Details of the developed algorithm are given in the following. An application to the optimal sizing of CMOS inverted second generation current conveyors is presented, and comparison results with published works are highlighted. SPICE simulation(More)
A multi-objective optimization algorithm, based on the Ant Colony Optimization technique (MOACO), to deal with the transistor sizing of CMOS Current Conveyors is presented. The main objectives are a minimal parasitic X-port resistance Rx and a maximal current high cut off frequency fci. A pareto front is then generated and the optimal solutions were(More)
The CMOS image sensors are achieving a growing presence in today's mobile applications as the industry acknowledges the advances of the CMOS-based technology and its scaling possibilities. The roadmap recently unveiled for CMOS Image Sensor is announcing ever smaller pixels, after 1.4μm pixel pitch, demos with a pitch of 1.1μm were presented,(More)
We propose a novel adaptation of the Ant Colony Optimization (ACO) Technique to optimize analog circuits sizing and design. The proposed algorithm is first tested and its performances are highlighted by using some mathematical test functions. This new adaptation of the ACO algorithm is then directly applied to optimize the design of typical analog circuits,(More)
Embedded block coding with optimized truncation (EBCOT) is an important feature of the latest digital still-image compression standard, JPEG2000; however, it consumes more than 50% of the computation time in the compression process. In this paper, we propose a new high speed VLSI implementation of the EBCOT algorithm. The main concept of the proposed(More)
Object detection has been attracting much interest due to the wide spectrum of applications that use it. Object detection technology has been driven by an increasing processing power available in software and hardware. In this work we present a developed application for multiple objects detection based on OpenCV libraries. The complexity-related aspects(More)
Currently, High Efficiency Video Coding (HEVC), is the new video compression standard published since 2013. The intention of HEVC is to optimize the coding efficiency. Then in order to achieve a high quality material and/or software implementation of this new standard, it is first necessary to analyze and to understand its complexity and its major(More)
Multi-objective metaheuristics are over and over again used by analog designers. Pareto fronts linking conflicting parameters are usually generated using different optimisation techniques. Conclusions on these fronts are generally made in a subjective manner; no performance measures are used! In this paper we deal with the use of two metrics, namely the(More)
A Variable Node Processing Unit (VNPU) and a Check Node Processing Unit (CNPU) are designed in order to be used in Low Density Parity Check (LDPC) decoding by the Min-Sum Algorithm (MSA). The designed blocks are fully parallel and flexible to be used for different block length when a regular (3, 6) LDPC codes are required. The proposed VNPU and CNPU have(More)
High Efficiency Video Coding (HEVC), the latest video standard, provides new algorithmic features that are substantial advances over those in previous standards in order to optimize the coding efficiency. HEVC performs with a high data compression ratio at the same level of video quality when compared to its predecessors, or substantially improved video(More)