Alexis Farcy

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EUROSERVER is a collaborative project that aims to dramatically improve data centre energy-efficiency, cost, and software efficiency. It is addressing these important challenges through the coordinated application of several key recent innovations: 64-bit ARM cores, 3D heterogeneous silicon-on-silicon integration, and fully-depleted silicon-on-insulator (FD(More)
A TCAD-based simulation approach is proposed to study the impact of transient coupling that occurs within a generic 3D integration on 65 nm technology based CMOS devices. This coupling is mainly due to signals applied on redistribution layer (RDL) and through-silicon vias (TSV). These both 3D-inherent metal structures may cause variations on normal(More)
Evaluation of Through Silicon Via (TSV) electrical performance is hardly required today to improve heterogeneous 3D chip performance in the frame of a " more than Moore " approach. Accurate modeling of TSV is consequently essential to perform design optimizations and process tuning. This paper proposes a methodology based on RF characterizations and(More)