Alexander Krupp

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Test processes in the automotive industry are tool-intensive and affected by technologically heterogeneous test infrastructures. In the industrial practice a product has to pass tests at several levels of abstraction such as Model-in-the-Loop (MIL), Software-in-the-Loop (SIL) and Hardware-in-the-Loop (HIL) tests. Different test systems are applied for this(More)
We introduce a structured methodology for the generation of executable test environments from textual requirement specifications via UML class diagrams and the application of the classification tree methodology for embedded systems. The first phase is a stepwise transformation from unstructured English text into a textual normal form (TNF), which is(More)
This article presents the classification tree method for functional verification to close the gap from the specification of a test plan to SystemVerilog (Chandra and Chakrabarty, 2001) test bench generation. Our method supports the systematic development of test configurations and is based on the classification tree method for embedded systems (CTM/ES)(More)
Nowadays, model-based test approaches are indispensable for the quality assurance of in-vehicle control software. In practice, the Classification-Tree Method for Embedded Systems (CTM EMB) is used to realize a compact graphical representation of test scenarios. Up to now, the CTM EMB has been used mainly in the area of continuous systems. Though the(More)
Ein wichtiges Qualitä tsmerkmal des modellbasierten Testsund damitbeim Test vonS imulink-Modellen sind¨Uberdeckungskriterien. Wirs tellene inen Ansatz zur Ve rbesserung der Testü berdeckung vonSimulink-Modellenunter Ve rwendung der Klassifikationsbaummethode (CTM) vor. Dazu erweitern wird ie CTMu me ineS i-gnalbeschreibung durch dieAbleitung eines Signals.
— Functional Verification is well-accepted for Electronic System Level (ESL) based designs and is supported by a variety of standardized Hardware Verification Languages like PSL, e, and SystemVerilog. In this article, we present the classification tree method for functional verification (CTM/FV) as a novel method to close the gap from the verification plan(More)
Today we can identify a big gap between requirement specification and the generation of test environments. This article extends the Classification Tree Method for Embedded Systems (CTM/ES) to fill this gap by new concepts for the precise specification of stimuli for operational ranges of continuous control systems. It introduces novel means for continuous(More)
This paper presents a formal verification for a bit-serial hardware architecture. The developed architecture bases on the combination of different design paradigms and requires sophisticated design optimizations. The recently patented synchronous bit-serial pipelined architecture, which we investigate in this paper , is comprised of synchronous and(More)