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- Hana Chockler, Alexander Ivrii, Arie Matsliah
- Haifa Verification Conference
- 2012

We describe an incremental algorithm for computing inter-polants for a pair ϕA, ϕB of formulas in propositional logic. In contrast with the common approaches, our method does not require a proof of unsatisfiability of ϕA ∧ ϕB, and can be realized using any SAT solver as a black box. We achieve this by combining model enumeration with the ability to easily… (More)

- Hana Chockler, Alexander Ivrii, Arie Matsliah, Shiri Moran, Ziv Nevo
- FMCAD
- 2011

—Formal verification is a reliable and fully automatic technique for proving correctness of hardware designs. Its main drawback is the high complexity of verification , and this problem is especially acute in regression verification, where a new version of the design, differing from the previous version very slightly, is verified with respect to the same or… (More)

We study the problem of encoding cardinality constraints (threshold functions) on Boolean variables into CNF. Specifically, we propose new encod-ings based on (perfect) hashing that are efficient in terms of the number of clauses, auxiliary variables, and propagation strength. We compare the properties of our encodings to known ones, and provide… (More)

- Alexander Ivrii, Sharad Malik, Kuldeep S. Meel, Moshe Y. Vardi
- Constraints
- 2015

Constrained sampling and counting are two fundamental problems arising in domains ranging from artificial intelligence and security, to hardware and software testing. Recent approaches to approximate solutions for these problems rely on employing SAT solvers and universal hash functions that are typically encoded as XOR constraints of length n/2 for an… (More)

- Gadi Aleksandrowicz, Hana Chockler, Joseph Y. Halpern, Alexander Ivrii
- J. Artif. Intell. Res.
- 2014

Halpern and Pearl introduced a definition of actual causal-ity; Eiter and Lukasiewicz showed that computing whether X = x is a cause of Y = y is NP-complete in binary models (where all variables can take on only two values) and Σ P 2-complete in general models. In the final version of their paper , Halpern and Pearl slightly modified the definition of… (More)

- Kuldeep S. Meel, Moshe Y. Vardi, +5 authors Sharad Malik
- AAAI Workshop: Beyond NP
- 2016

Constrained sampling and counting are two fundamental problems in artificial intelligence with a diverse range of applications , spanning probabilistic reasoning and planning to constrained-random verification. While the theory of these problems was thoroughly investigated in the 1980s, prior work either did not scale to industrial size instances or gave up… (More)

In this paper we address the following problem: given an unsatisfi-able CNF formula F, find a minimal subset of variables of F that constitutes the set of variables in some unsatisfiable core of F. This problem, known as variable MUS (VMUS) computation problem, captures the need to reduce the number of variables that appear in unsatisfiable cores. Previous… (More)

- Jason Baumgartner, Alexander Ivrii, Arie Matsliah, Hari Mony
- FMCAD
- 2012

—Localization is a powerful automated abstraction-refinement technique to reduce the complexity of property checking. This process is often guided by SAT-based bounded model checking, using counterexamples obtained on the abstract model, proofs obtained on the original model, or a combination of both to select irrelevant logic. In this paper, we propose the… (More)

- Arie Gurfinkel, Alexander Ivrii
- FMCAD
- 2015

—IC3 is undoubtedly one of the most successful and important recent techniques for unbounded model checking. Understanding and improving IC3 has been a subject of a lot of recent research. In this regard, the most fundamental questions are how to choose Counterexamples to Induction (CTIs) and how to generalize them into (blocking) lemmas. Answers to both… (More)

Verification is a critical task in the development of correct computing systems. Simulation remains the predominantly used technique to identify design flaws, due to its scalability. However, simulation intrinsically suffers from low functional coverage, hence often fails to identify <i>all</i> design flaws. Formal verification (FV) is a promising approach… (More)