Alex Bobrek

Learn More
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Currently, the most accurate methods of simulating the interactions between these components operate at the cycle-accurate level, which can be very slow to execute for largesystems.(More)
As System On a Chip (SoC) designs become more like Programmable Heterogeneous Multiprocessors (PHMs), the highest levels of design will place emphasis on the custom design of elements that were traditionally associated with systems in the large. We motivate how schedulers that make dynamic, data-dependent decisions at run-time will be key design elements in(More)
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs traditionally targeted by the Design Automation (DA) community, general purpose designs traditionally targeted by the Computer Architecture (CA) community, nor pure embedded designs(More)
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of individual design changes. This work is the first to parameterize shared resource accesses in the form of <i>access attributes</i>, summarizing the impact of shared resource contention(More)
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task pre-emption, power-saving voltage/frequency scaling, or arrival of new events/data from the outside world. Traditionally, the designers model these events by explicitly coupling them to corresponding simulation events within environments such as(More)
  • 1