Albrecht Mayer

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Effective integration of advanced Systems-on-Chip (SoC) requires extensive reuse of IP modules as well as automation of the IP integration process, including verification. Key enablers for this are standards to describe and package IP modules. We focus on the IP-XACT standards and demonstrate how these standards are deployed in three industrial IP(More)
The introduction of complex SoCs with multiple processor cores presents new development challenges, such that development support is now a decisive factor when choosing a System-on-Chip (SoC). The presented developments support strategy addresses the challenges using both architecture and technology approaches. The Multi-Core Debug Support (MCDS)(More)
In this paper, we firstly give an overview of the security perimeter in modern automotive systems and propose then a cost effective solution for authentication of communication data. The proposed solution provides end to end protection, it covers the aspects data content and generation time (freshness) and it can be implemented for different standard(More)
Microcontrollers are the core part of automotive Electronic Control Units (ECUs). A significant investment of the ECU manufacturers and even their customers is linked to the specified microcontroller family. To preserve this investment it is required to continuously design new generations of the microcontroller with hardware and software compatibility but(More)
Hardware-in-the-Loop (HIL) simulation is an important method in the design and validation process of complex hardware/software systems like electronic control units (ECU) for automotive applications. In [1] we presented an approach called Chip Hardware-In-The-Loop Simulation (CHILS) to embed a microcontroller (MC) into different simulation environments. To(More)
Contention for shared resources is a major performance issue in multicore systems. In embedded multicore microcontrollers, contentions of program flash accesses have a significant performance impact, because the flash access has a large latency compared to a core clock cycle. Therefore, the detection and analysis of program flash contentions are necessary(More)
SystemC, users and tool providers are at a crossroads. More and more companies are using SystemC; however EDA companies are hesitant to give a full commitment to SystemC tools, especially at system-level. There are several reasons for this dichotomy. While users seem excited about SystemC for its technical qualities for system-level design, tool providers(More)
Locks are widely used as a synchronization method to guarantee the mutual exclusion for accesses to shared resources in multi-core embedded systems. They have been studied for years to improve performance, fairness, predictability etc. and a variety of lock implementations optimized for different scenarios have been proposed. In practice, applying an(More)
Advanced debug support and trace capabilities are getting ever more important for overcoming the challenges of developing complex real-time embedded systems containing complex Systems-on-Chip (SoCs). Gathering and handling of very large software and system traces becomes a major challenge. We present an approach of recording and fusing software and system(More)