Alberto Valdes-Garcia

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—A phased-array transmitter (TX) for multi-Gb/s non-line-of-sight links in the four frequency channels of the IEEE 802.15.3c standard (58.32 to 64.8 GHz) is fully integrated in a 0.12-m SiGe BiCMOS process. It consists of an up-conversion core followed by a 1:16 power distribution tree, 16 phase-shifting front-ends, and a digital control unit. The TX core(More)
—This paper presents a CMOS RF amplitude detector as a practical integrated test device and demonstrates its application for on-chip testing. The proposed circuit performs full-wave rectification and generates a dc voltage proportional to the amplitude of an RF signal over a wide frequency range. The design considerations and analysis of operation for the(More)
—This work presents an analysis on frequency planning and synthesis for multiband (MB) orthogonal frequency-division multiplexing (OFDM) ultra-wideband (UWB) radios operating in the range of 3.1–10.6 GHz. The most important specifications for the frequency synthesizer in an MB-OFDM UWB transceiver are provided. A synthesizer architecture for an existing(More)
  • Scott Reynolds, Alberto Valdes-Garcia, Brian Floyd, Troy Beukema, Brian Gaucher, Duixian Liu +2 others
  • 2007
— A feature-rich second-generation 60-GHz transceiver chipset is introduced. It integrates dual-conversion superheterodyne receiver and transmitter chains, a sub-integer frequency synthesizer, full programmability from a digital interface, modulator and demodulator circuits to support analog modulations (e.g. MSK, BPSK), as well as a universal I&Q interface(More)
A wafer-scale graphene circuit was demonstrated in which all circuit components, including graphene field-effect transistor and inductors, were monolithically integrated on a single silicon carbide wafer. The integrated circuit operates as a broadband radio-frequency mixer at frequencies up to 10 gigahertz. These graphene circuits exhibit outstanding(More)
WIRELESS COMMUNICATION DEVICES, among the semiconductor industry's most important products, are gathering a continually growing number of standards and applications. In today's competitive market, incorporating a comprehensive testing strategy into a wireless mod-ule's design flow is indispensable to its timely development and economic success. 1-3 Modern(More)
This paper presents an analog built-in testing (BIT) architecture and its implementation. It enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface. External analog instrumentation is avoided, reducing test time and cost. The proposed on-chip testing scheme uses(More)
A CMOS RF RMS detector is introduced. It generates a DC proportional to the RMS voltage amplitude of an RF signal. Its high input impedance and small silicon area make it suitable for the built-in testing (BIT) of critical RF blocks of a transceiver such as a Low Noise Amplifier (LNA) and Power Amplifier (PA) without affecting their performance and with(More)
—Current and future integrated systems demand cost-effective test solutions. In response to that need, this work presents a very compact mixed-signal test system. It performs the characterization of the magnitude and phase responses over frequency at multiple nodes of an analog circuit. The control inputs and output of this system are digital, enabling the(More)