Alain Bravaix

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An overview of evolution of transistor parameters under negative bias temperature instability stress conditions commonly observed in p-MOSFETs in recent technologies is presented. The physical mechanisms of the degradation as well as the different defects involved have been discussed according to a systematic set of experiments with different stress(More)
Power law time-to-breakdown voltage acceleration is investigated down to ultra-thin oxides (1.1 nm) in the ESD regime in inversion and accumulation. Breakdown modes, oxide degradation and device drifts under ESD-like stress are discussed as function of the oxide thickness. The consequent impacts on the ESD design window are presented. 2009 Elsevier Ltd. All(More)
We focus in this study on the negative bias temperature instability (NBTI)-induced /spl Delta/N/sub IT/ phenomenon and we point out its relative gate-oxide thickness (T/sub OX/) dependences. Studies are carried out in a large T/sub OX/ range, comparing the gate-oxide quality which was grown with or without nitrogen incorporation. We have developed an oxide(More)
This paper discusses the characterization and modeling methodology for NBTI for subsequent use in reliability simulations. Given the integral recovery post NBTI stress, we use on-the-fly technique to measure degradation. A new and fully experimental means of interpretation of results from OTF is presented. We also present some new evidence of(More)
Hot-carrier reliability is studied in core logic PMOSFETs with a thin gate-oxide (Tox 1⁄4 2 nm) and in Input/Output PMOSFETs with a thick gate-oxide (6.5 nm) used for systems on chip applications. Hot-hole (HH) injections are found to play a more important role in the injection mechanisms and in the degradation efficiency. This depends on the technology(More)