Akira Hatanaka

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Coarse grain reconfigurable arrays (CGRAs) have been drawing attention due to its programmability and performance. Compilation onto CGRAs is still an open problem. Several groups have proposed algorithms that software pipeline loops onto CGRAs. In this paper, we present an efficient modulo scheduling algorithm for a CGRA template. The novelties of the(More)
In this paper we propose a template of architectures that comprise of multiple autonomous processors interconnected via FIFO links. We extend conventional list scheduling algorithm to schedule applications on the proposed distributed architecture template. We explain how a graph representation of an architecture can be used to route operands and how edge(More)
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