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Heterogeneous architectures, where a multicore processor is accompanied with a large number of simpler, but more power-efficient CPU cores optimized for parallel workloads, are receiving a lot of attention recently. At present, these co-processors, such as the Intel Xeon Phi product family, come with limited on-board memory, which requires partitioning(More)
The increasing prevalence of co-processors such as the Intel Xeon Phi, has been reshaping the high performance computing (HPC) landscape. The Xeon Phi comes with a large number of power efficient CPU cores, but at the same time, it's a highly memory constraint environment leaving the task of memory management entirely up to application developers. To reduce(More)
Many-core processors are gathering attention in the areas of embedded systems due to their power-performance ratios. To utilize cores of a many-core processor in parallel, programmers build multi-task applications that use the task models provided by operating systems. However, the conventional task models cause some scalability problems when multi-task(More)
Many service providers distribute various kinds of content over the Internet. They often use replica servers to provide stable service. To position them appropriately, service providers must predict the demands for their services and provide computing capacity sufficient for servicing the demands. Unfortunately, predicting demands is difficult because(More)
Single-particle coherent X-ray diffraction imaging using an X-ray free-electron laser has the potential to reveal the three-dimensional structure of a biological supra-molecule at sub-nanometer resolution. In order to realise this method, it is necessary to analyze as many as 1 × 10(6) noisy X-ray diffraction patterns, each for an unknown random target(More)
This paper proposes a novel parallel task model for an exascale heterogeneous computing environment consisting of multi-core and many-core CPUs. In the proposed environment, "Multiple Partitioned Virtual Address Space (Multiple PVAS)," all PVAS tasks on the hybrid system share the same virtual address space, so any PVAS task can access the data owned by the(More)
Someworkers haveassociatedfecal bile acids with colon cancer frequency. They suggest that the risk for colon cancer increases with a rise in the level of total and degraded fecal bile acids. The Japanese in Hawaii, who are at high risk for this cancer, had higher concentrations of deoxycholic acid (a degraded bile acid) in their fecal speci mens than did(More)
In many-core environments, the performance and memory footprint of MPI intra-node communications are both important issues. In this paper, we contend that the address space boundaries between MPI processes are detrimental to efficient intra-node communication and should be removed as we advance into the many-core era. We confirmed this contention by using(More)
The Intel Many Integrated Core (Intel MIC) architecture is Intel's latest design targeted for processing highly parallel workloads. The Intel MIC architecture is implemented on a PCI card, and has its own on-board memory, connected to the host memory through PCI DMA operations. The on-board memory is faster than the one in the host, but it is significantly(More)
Heterogeneous architectures, where a multicore processor is accompanied with a large number of simpler, but more power-efficient CPU cores optimized for parallel workloads, are receiving a lot of attention these days. Currently, these co-processors come with a limited on-board memory, which requires partitioning computational problems manually into pieces(More)