Akinori Kanasugi

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This paper proposes a novel processor for genetic algorithm (GA) using dynamically reconfigurable memory. In general GA, number of population is always constant. However, accuracy of solution is low at first-half stage. Therefore, the number of population is doubled at the expense of accuracy of solution, and the searching ability is improved at first-half(More)
Genetic algorithm (GA) is one of optimization algorithm based on an idea for evolution of life. GA can be applied various combination optimization problem. This paper proposes a parallel processor for distributed genetic algorithm (DGA) with redundant binary number. Since a redundant binary number has redundancy, solution expression becomes variegated. For(More)
This paper proposes a novel processor for genetic algorithm (GA) that can dynamically change number of individuals and accuracy. In conventional GA, number of population and accuracy are fixed. However, the accuracy of solution is low at first-half stage. Therefore, the number of population is doubled at expense of the accuracy of solution, and the(More)
This paper describes a design of novel processor for genetic algorithm (GA) based on redundant binary number. In conventional GA, genetic information is expressed by binary number. On the other hand, the proposed processor is based on redundant binary number. Therefore, the number of expression of optimized solutions for the target function increase. For(More)
Genetic algorithm (GA) is one of optimization algorithm based on an idea for evolution of life. GA can be applied various combination optimization problem. This paper proposes a novel distributed genetic algorithm (DGA) with redundant binary number. Since a redundant binary number has redundancy, solution expression becomes variegated. For this reason, it(More)
In recent years, demand for field-programmable gate arrays (FPGAs) has increased significantly. Designed similarly to software, FPGAs opened the door to the field of hardware for many people. However, developing a circuit using conventional methods is time consuming. In this paper, we propose a processor generator that can shorten development time and(More)
Real Coded Genetic Algorithm (RCGA) has been attracting attention as one of the GA for handling real-valued vectors. Various GA hardware have been proposed, for evolvable hardware, and for an increase in computational throughput. Yet, there are few reports of RCGA hardware. Herein, we propose a design for a real coded GA processor. The proposed processor is(More)
This paper proposes hardware implementation of evolutionary algorithms using dynamic reconfiguration technology. In this paper two types of dynamic reconfiguration for evolutionary algorithm are introduced. The processor was designed by using VHDL and the circuit was simulated. The effectiveness of the proposal processor was confirmed.