Ajit Pal

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Traffic grooming, routing, and wavelength assignment in an optical WDM mesh networks based on clique partitioning

Tanmay De, Ajit Pal, Indranil Sengupta
Photonic Network Communications
2010

In wavelength routed optical networks, the number of wavelength channels is limited due to several constraints and each wavelength as well as each lightpath support traffic in the Gbps range. On the… (More)

A general graph theoretic framework for multi-layer channel routing

Rajat K. Pal, A. K. Datta, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal
VLSI Design
1995

In this p a p e r we propose a general framework for viewing a class of heuristics f o r track assignment in channel routing f rom a purely graph theoretic angle. Within this framework we propose… (More)

Formal Verification of Architectural Power Intent

Aritra Hazra, Sahil Goyal, Pallab Dasgupta, Ajit Pal
IEEE Transactions on Very Large Scale Integration…
2013

This paper presents a verification framework that attempts to bridge the disconnect between high-level properties capturing the architectural power management strategy and the implementation of the… (More)

Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits

Nikhil Tripathi, Amit M. Bhosle, Debasis Samanta, Ajit Pal
VLSI Design
2001

Development of the process technology for dual threshold (dual Vth ) CMOS circuit has opened up the possibility of using it to reduce static power in low voltage high performance circuits. It has… (More)

Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent

Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha
Design Automation Conference
2010

Recent research has indicated ways of using UPF specifications for extracting valid low-level control sequences to express the transitions between the power states of individual domains. Today there… (More)

Power Efficient Design of Multiplexer based Compressor using Adiabatic Logic

Richa Singh, Anjali Sharma, +32 authors Michio Yokoyama
2013

Demand of low power circuits design is increasing due to the large growth in portable digital equipment. In this reference adiabatic structure are used that provides a dramatic reduction in power… (More)

Low Power Sensor Node for a Wireless Sensor Network

Akepati Sravan, Sujan Kundu, Ajit Pal
20th International Conference on VLSI Design held…
2007

Wireless sensor networks are finding widespread use in diverse applications. The sensor nodes, which are also called as motes, are getting smaller, but their battery charge density is not getting… (More)

POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent

Aritra Hazra, Rajdeep Mukherjee, +4 authors Subhankar Mukherjee
IEEE Transactions on Computer-Aided Design of…
2013

With the growing complexity and gradually shrinking power requirements in the system-on-chip designs, sophisticated global power management policies (which orchestrate the switching between power… (More)

Operator Scheduling Revisited: A Multi-objective Perspective for Fine-Grained DVS Architecture

Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta, Ajit Pal
ACITY
2012

NP-Completeness of Multi-Layer No-Dogleg Channel Routing and an Efficient Heuristic

Rajat K. Pal, Sudebkumar Prasant Pal, Ajit Pal, Alak K. Dutta
VLSI Design
1993

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