Ahmed Bouajjani

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We apply the symbolic analysis principle to pushdown systems We represent possibly in nite sets of con gurations of such systems by means of nite state automata In order to reason in a uniform way about analysis problems involving both existential and universal path quanti ca tion such as model checking for branching time logics we consider the more general(More)
We study property preserving transformations for reactive systems The main idea is the use of simulationsparameterizedbyGalois connections relating the lattices of properties of two systems We propose and study a notion of preservation of properties expressed by formulas of a logic by a function mapping sets of states of a system S into sets of states of a(More)
We present a generic aproach to the static analysis of concurrent programs with procedures. We model programs as communicating pushdown systems. It is known that typical dataflow problems for this model are undecidable, because the emptiness problem for the intersection of context-free languages, which is undecidable, can be reduced to them. In this paper(More)
We consider symbolic on-they veriication methods for systems of nite-state machines that communicate by exchanging messages via unbounded and lossy FIFO queues. We propose a novel representation formalism, called simple regular expressions (SREs), for representing sets of states of protocols with lossy FIFO channels. We show that the class of languages(More)
We introduce two abstract models for multithreaded programs based on dynamic networks of pushdown systems. We address the problem of symbolic reachability analysis for these models. More precisely, we consider the problem of computing effective representations of their reachability sets using finite-state automata. We show that, while forward reachability(More)
We consider symbolic on-they veriication methods for systems of nite-state machines that communicate by exchanging messages via unbounded and lossy FIFO queues. We propose a novel representation formalism, called simple regular expressions (SREs), for representing sets of states of protocols with lossy FIFO channels. We show that the class of languages(More)
This paper presents an on-the-fly and symbolic technique for efficiently checking timed automata emptiness. It is symbolic because it uses the simulation graph (instead of the region graph). It is on-the-fly because the simulation graph is generated during the test for emptiness. We have implemented a verification tool called PROFOUNDER based on this(More)
Regular model checking is a generic technique for verification of infinite-state and/or parametrised systems which uses finite word automata or finite tree automata to finitely represent potentially infinite sets of reachable configurations of the systems being verified. The problems addressed by regular model checking are typically undecidable. In order to(More)