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Race Logic: A hardware acceleration for dynamic programming algorithms
We propose a novel computing approach, dubbed “Race Logic”, in which information, instead of being represented as logic levels, as is done in conventional logic, is represented as a timing delay.Expand
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A 4-mm2 180-nm-CMOS 15-Giga-cell-updates-per-second DNA sequence alignment engine based on asynchronous race conditions
We have fabricated and successfully tested, for the first time, a prototype chip of a Race Logic computing paradigm, which makes positive use of race conditions for accelerating a broad class ofExpand
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Boosted Race Trees for Low Energy Classification
When extremely low-energy processing is required, the choice of data representation makes a tremendous difference. Each representation (e.g. frequency domain, residue coded, log-scale) comes with aExpand
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High-Throughput Pattern Matching With CMOL FPGA Circuits: Case for Logic-in-Memory Computing
In this paper, we propose a novel CMOS+MOLecular (CMOL) field-programmable gate array (FPGA) circuit architecture to perform massively parallel, high-throughput computations, which is especiallyExpand
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Race Logic: Abusing Hardware Race Conditions to Perform Useful Computation
This article proposes a novel computing approach, dubbed race logic, in which information, instead of being represented as logic levels (as in conventional logic), is represented as a timing delay.Expand
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Mapping of image and network processing tasks on high-throughput CMOL FPGA circuits
A simple two-terminal memristive device has excellent scaling properties. For example, devices with footprint below 10×10 nm2 have been recently demonstrated and crossbar structures provide means ofExpand
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Storing and retrieving wavefronts with resistive temporal memory
We extend the reach of temporal computing schemes by developing a memory for multi-channel temporal patterns or "wavefronts." This temporal memory re-purposes conventional one-transistor-one-resistorExpand
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Temporal Memory with Magnetic Racetracks
Race logic is a relative timing code that represents information in a wavefront of digital edges on a set of wires in order to accelerate dynamic programming and machine learning algorithms.Expand
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A Truth-Matrix View into Unary Computing
Our community has been exploring Timeof-arrival based codes as a candidate for very low energy information processing [3], [1]. A “space-time” algebra has been recently proposed that captures theExpand
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A configurable CMOS memory platform for 3D-integrated memristors
Memristors are emerging as powerful nanoscale devices for diverse applications, such as high-density memories and neuromorphic applications. However, this nascent technology requires considerableExpand
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