Learn More
Leakage power loss is a major concern in deep-submicron technologies as it drains the battery even when a circuit is completely idle. In this paper, we first present a novel leakage reduction technique and then compare and contrast it with other well established leakage reduction techniques. Our leakage reduction technique achieves cancellation of leakage(More)
With the migration to Deep Sub-Micron (DSM) process technologies, the static power (leakage) has become the major contributor to the design's overall power consumption. In this work, we will show experiments that illustrate the significant increase in the ratio of the leakage to the total power as the DSM process nodes shrink. We will also present a novel(More)
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications described at high-level of abstraction, fabrication dependent technology parameters and un-sized circuit topologies. The output is a sized net list, which meets the user(More)
  • 1