Adrian Chirila-Rus

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Traditional design and test of complex multimedia systems involves a large number of test vectors and is a difficult and time-consuming task. The simulation times are prohibitively long on current desktop computers. Driving actual design scenarios and timing burst behavior which produce real-time effects is difficult to do with current simulation(More)
Traditional design and test of complex multimedia systems involves a large number of test vectors and is a difficult and time-consuming task. The simulation times are prohibitively long on current desktop computers. Driving actual design scenarios and timing burst behavior which produce real-time effects is difficult to do with current simulation(More)
Increasing resolutions push the throughput requirements of video codecs and complicate the challenges encountered during their cost-efficient implementations. We propose an FPGA implementation of a high-performance MPEG-4 simple profile video decoder, capable of parsing multiple bitstreams from different encoder sources. Its video pipeline architecture(More)
The improving resolutions of new video appliances continuously increase the throughput requirements of video codecs and complicate the challenges encountered during their cost-efficient design. The energy limitations of mobile appliances create the demand for low-power implementations. We propose a custom high-performance MPEG-4 video encoder. The fully(More)
The latest video standards such as ITU-T H.264 and MPEG-4 Part 10 introduce important bitrate gains but at the cost or increased complexity, especially at the encoder. One important tool is the variable block sizes motion estimation/compensation, which presents the possibility of using blocks ranging from 16times16 down to 4times4, offering the choice of(More)
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