Adib Abrishamifar

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An efficient FPGA implementation of an irrational CIC filter for decimation in digital receivers is presented in this paper. The proposed approach employs dual-port RAMs prevailing in almost all recent FPGAs, favorably decreases the number of used slices and increases the operating frequency. The circuit has been implemented on a Xilinx Virtex-II Pro(More)
In this paper, a novel active block for analog signal processing is presented, namely the current controlled current differential current conveyor (CCCDCC). This multi terminal block has most features of the well-known CCII (Second Generation Current Conveyor) and CCCDTA (Current Controlled Current Differencing Tranconductance Amplifier) to simplify the(More)
1  Abstract— A low power Multiphase-Delay-Locked-Loop (MDLL) with a self-biased Charge Pump (CP) and a wide-range linear delay element is presented. Body feed technique and proper voltage converters are utilized in the proposed Voltage-Controlled-Delay-Line (VCDL) to widen applicable range of control voltage and overcome the nonlinearity of the(More)
This paper presents a low voltage highly linear CMOS up conversion mixer based on current conveyor (CCII), which converts an input of 100MHz IF signal to an output of 2.4GHz RF signal. The linearity of the designed mixer is greatly enhanced by utilizing a fully differential current conveyor. The flipped voltage follower (FVF) technique is applied for(More)
In this paper a hybrid approach is presented to design and implement a GSM digital down convertor for enhanced resource utilization. The proposed DDC has been implemented by hybridizing the multiplier less and multiplier based decimators. A multiplier less CIC decimator has been used to reduce the cost by reducing the multiplier requirement. Two(More)
–This paper describes a wide frequency range and low jitter delay-locked loop. A new architecture is proposed for lock-detect circuit that solves the problem of false locking associated with conventional DLLs. The exact 50% duty cycle is not necessary for the correct operation of this architecture. The circuit design and ADS simulation are based upon TSMC(More)
Nowadays, multilevel voltage source inverters offer several advantages compared to their conventional two-level inverters. In these inverters, by synthesizing several levels of dc voltages, the staircase output waveform is produced. The structure of this waveform will have lower total harmonic distortion which leads to an approach to a desired sinusoidal(More)