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The global address space (GAS) programming model provides important potential productivity advantages over traditional parallel programming models. Languages using the GAS model currently have insufficient support from existing performance analysis tools, due in part to their implementation complexity. We have designed the Global Address Space Performance(More)
RapidIO is an emerging standard for switched interconnection of processors and boards in embedded systems. We use discrete-event simulation to evaluate and prototype RapidIO-based systems with respect to their performance in an environment targeted towards space-based radar applications. This application class makes an ideal test case for a RapidIO(More)
Space-based radar is a suite of applications that presents many unique system design challenges. In this paper, we investigate use of RapidIO, a new high-performance embedded systems interconnect, in addressing issues associated with the high network bandwidth requirements of real-time ground moving target indicator (GMTI), and synthetic aperture Radar(More)
The design of space systems capable of performing realtime Synthetic Aperture Radar (SAR) is a significant challenge in HPEC due to the high processor, memory, and network requirements imposed by SAR. However, building a system to support SAR and other Space-Based Radar (SBR) algorithms simultaneously is an even greater challenge. This presentation(More)
Space-Based Radar (SBR) processing is a processorand communication-intensive HPEC application that presents unique design challenges. This talk will concentrate on the presentation of simulation results of mapping a parallel Ground Moving Target Indicator (GMTI) application on an embedded multiprocessor satellite processing system featuring a RapidIO(More)
Due to the wide range of compilers and the lack of a standardized performance tool interface, writers of performance tools face many challenges when incorporating support for global address space (GAS) programming models such as Unified Parallel C (UPC), Titanium, and Co-Array Fortran (CAF). This document presents a Global Address Space Performance tool(More)
Achieving a significant fraction of peak performance on a modern high-performance computer is a challenging task. Fortunately, many performance analysis tools exist that can be used to improve the efficiency of parallel programs. However, while these tools can be very effective at troubleshooting performance problems, finding the right performance tool for(More)
Scientific programmers must optimize the total time-to-solution, the combination of software development and refinement time and actual execution time. The increasing complexity at all levels of supercomputing architectures, coupled with advancements in sequential performance and a growing degree of hardware parallelism, has increasingly placed the bulk of(More)
Due to the wide range of compilers and the lack of a standardized profiling interface, writers of performance tools face many challenges when incorporating support for Unified Parallel C (UPC) programs. This document presents a preliminary specification for a standard profiling interface that attempts to be flexible enough to be adapted into current UPC(More)
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