Abhirup Lahiri

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This paper presents a new realization of resistorless mixed-mode (i.e. both voltage-mode and currentmode) quadrature sinusoidal oscillator using a new active building block (ABB) called the differential voltage current-controlled conveyor transconductance amplifier (DVCCCTA). The proposed oscillator circuit uses a single DVCCCTA, two grounded capacitors(More)
The paper deals with a pair of current-mode sine-wave oscillator circuits. Both these circuits are implemented using positive second-generation current conveyors (CCII+). The principle of the first oscillator is based on a conventional Wien-bridge network. However, this implementation suffers from the use of a floating capacitor, which can be unacceptable(More)
This paper presents a first of its kind canonic realization of active RC (ARC) sinusoidal oscillator with non-interactive/independent tuning laws, which simultaneously provides buffered quadrature voltage outputs and explicit quadrature current outputs. The proposed circuit is created using a new active building block, namely the Z-copy controlled-gain(More)
This article presents a voltage-mode universal biquadratic filter (low-pass, high-pass, band-pass functions), based on current controlled current conveyor transconductance amplifiers (CCCCTAs). The features of the circuit are that: the quality factor and pole frequency can be tuned orthogonally via the input bias currents: the circuit description is very(More)
In addition to the recently proposed full-wave rectifier by Prommee et al. [25] using voltage-mode (VM) two-cell winner-takes-all (WTA) circuit, we present currentmode (CM) precision full-wave rectifier using CM two-cell WTA circuit. The popular Lazzaro’s CM WTA circuit has been employed for the purpose and there is no requirement of inverting the input(More)
In this paper a fully CMOS implementation of current-mode full-wave precision rectifier is presented. The structure is generally based on the recently presented Lazzaro's winner-takes-all (WTA) circuit. The rectifier has been implemented using the 0.35 μm CMOS technology and its behavior verified by SPICE. The simulation results shown feasibility to(More)