Abhijit K. Deb

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As we move from algorithm on a chip to system on a chip era, the design bottleneck is shifting from individual DSP functions to global control that composes a system from these functions. The practice in industry suffers from global control entering the design flow too late, discontinuity between functional modeling and implementation phase and mixing data(More)
In this paper, we systematically define three <b>transaction level models</b> (TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP system. We also show a unique language support to build the TLMs. Our results show that the abstract TLMs can be built and simulated much faster than the(More)
DSP systems are often modeled using functional and bittrue level simulators, where it is not possible to validate the System Level Timing, Control and Configuration (SLTCC) of the product. In this paper, we present a methodology that adds SLTCC specified in grammar to functional models to create a rate true system level virtual prototype. The methodology is(More)
Expensive top-down iterations are often required in the design cycle of complex DSP systems. In this paper, we introduce two levels of abstraction in the design flow by systematically categorizing the architectural decisions. As a result, the top-down iteration loop is broken. We also present a technique to capture and inject the architectural decisions(More)
The research and development on in-vehicle networks (IVNs) is driven by two main requirements: bandwidth and robustness. In this paper we address the robustness requirement. We focus on FlexRay IVNs that are used for safety-critical applications. We analyze and discuss faults that may affect the startup and operation of a FlexRay network. These failures may(More)
MASIC, short for Maths to ASIC, models embedded DSP systems using grammar based technique. This paper presents a simulation and analysis technique for the MASIC model of a system. We build a Petri Net (PN) representation of the MASIC model to simulate the communication architecture. It helps to evaluate the effects of architectural decisions early in the(More)
Many semiconductor circuit wearout monitoring techniques have been developed for different applications. This paper presents an overview of the prominent wearout monitoring techniques. We systematically categorize the semiconductor wearout monitoring techniques and qualitatively assess the different categories for the health monitoring application.(More)
The time required by an embedded system to process information does not only depend on the amount of data; it also depends heavily on the synchronization overhead, bus protocol and communication architecture. This paper presents a technique to estimate the performance of the control and communication part of an embedded system modeled using the MASIC(More)