Aaron D. Franklin

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Although carbon nanotube (CNT) transistors have been promoted for years as a replacement for silicon technology, there is limited theoretical work and no experimental reports on how nanotubes will perform at sub-10 nm channel lengths. In this manuscript, we demonstrate the first sub-10 nm CNT transistor, which is shown to outperform the best competing(More)
Moving beyond the limits of silicon transistors requires both a high-performance channel and high-quality electrical contacts. Carbon nanotubes provide high-performance channels below 10 nanometers, but as with silicon, the increase in contact resistance with decreasing size becomes a major performance roadblock. We report a single-walled carbon nanotube(More)
BACKGROUND: Transistors are one of the most enabling " hidden " technologies of all time and have facilitated the development of computers , the Internet, thin mobile displays, and much more. Silicon, which has been the material of choice for transistors in nearly every application for decades , is now reaching the fundamental limits to what it can offer(More)
Photonic signal processing requires efficient on-chip light sources with higher modulation bandwidths. Today's conventional fastest semiconductor diode lasers exhibit modulation speeds only on the order of a few tens of GHz due to gain compression effects and parasitic electrical capacitances. Here we theoretically show an electrically-driven carbon(More)
—Vertical single-walled carbon nanotubes (v-SWCNTs) are synthesized within highly ordered porous anodic alumina (PAA) templates supported on Si substrates. A process for obtaining thin-film PAA with long-range ordered nanopores is presented in this paper. Each nanopore contains at most one v-SWCNT that is supported by a dielectric and addressed by(More)
— A semianalytical carbon nanotube field-effect transistor (CNFET) model based on the virtual-source model is presented, which includes series resistance, parasitic capacitance, and direct source-to-drain tunneling leakage. The model is calibrated with recent experimental data down to 9-nm gate length. Device performance of 22-to 7-nm technology nodes is(More)
The one-dimensional, cylindrical nature of single-walled carbon nanotubes ͑SWCNTs͒ suggests that the ideal gating geometry for nanotube field-effect transistors ͑FETs͒ is a surround gate ͑SG͒. Using vertical SWCNTs templated in porous anodic alumina, SGs are formed using top-down processes for the dielectric/metal depositions and definition of the channel(More)
The interfaces in devices made of two-dimensional materials such as MoS2 can effectively control their optoelectronic performance. However, the extent and nature of these deterministic interactions are not fully understood. Here, we investigate the role of substrate interfaces on the photodetector properties of MoS2 devices by studying its photocurrent(More)
In search of opto-electronic nano materials, we often come across Gallium Nitride nanotubes (GaN-NT) with excellent electrical and optical characteristics. Gallium Nitride nanotubes are predominantly semiconducting and have been less explored in its application as a transistor channel through Density Functional Theory (DFT). Comparing Gallium Nitride(More)