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As microprocessor chips integrate a growing number of cores, the issue of interconnection becomes more important for overall system performance and efficiency. Compared to traditional distributed shared-memory architecture, chip-multiprocessors offer a different set of design constraints and opportunities. As a result, a conventional packet-relay(More)
Main-stream general-purpose microprocessors require a collection of high-performance interconnects to supply the necessary data movement. The trend of continued increase in core count has prompted designs of packet-switched network as a scalable solution for future-generation chips. However, the cost of scalability can be significant and especially hard to(More)
[11] A. Stroele, " BIST patter generators using addition and subtraction operations , " J. A concurrent built-in self-test architecture based on a self-testing RAM, " IEEE Trans. An on-chip march pattern generator for testing embedded memory cores, " IEEE Trans. Diagnostic data compression techniques for embedded memories with built-in self-test, " J.(More)
With increasing core count, chip multiprocessors (CMP) require a high-performance interconnect fabric that is energy-efficient. Well-engineered transmission line-based communication systems offer an attractive solution, especially for CMPs with a moderate number of cores. While transmission lines have been used in a wide variety of purposes, there lack(More)
Graphics processing units (GPUs) continue to grow in popularity for general-purpose, highly parallel, high-throughput systems. This has forced GPU vendors to increase their focus on general purpose workloads, sometimes at the expense of the graphics-specific workloads. Using GPUs for general-purpose computation is a departure from the driving forces behind(More)
—The growing number of cores in chip multi-processors increases the importance of interconnection for overall system performance and energy efficiency. Compared to traditional distributed shared-memory architectures, chip-multiprocessors offer a different set of design constraints and opportunities. As a result, a conventional packet-relay multiprocessor(More)
Near-threshold voltage (NTV) computing is a popular approach to substantially improve energy efficiency in modern microelectronics devices. Two challenges have hindered the integration of NTV into the mainstream: (1) reduced performance and (2) greater vulnerability to the effects of process variation, particularly as transistor dimensions decrease.(More)
Distributing high quality clock signals is one of the most challenging tasks in high-performance microprocessors. Clocking circuitry accounts for an overwhelming amount of total power consumption in multi-GHz processors. Unfortunately, deteriorating clock skew and jitter make it very difficult to reduce power dissipation. We propose a new global clocking(More)
Carpenter, Aaron, "The Advantage of Wealth: How partisan success is affected by rising income inequality in the United States" Abstract: After the end of the Second World War, the United States when through a period of great growth. As the economy grew, income inequality also grew within the country. Parallel to this, as income inequality increased,(More)