Aamir A. Farooqui

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A programmable data-path that supports MPEG standards Synthetic & Natural Hybrid video Coding (SNHC) is presented. It can support a maximum of 16 parallel SIMD integer operations and 2 parallel SIMD floating-point operations. Two new instructions were added in order to increase the execution of 3D graphics and SNHC as well as to speed up IDCT, FFT, and(More)
— A Parallel algorithm and its hardware implementation of Inverse Halftone operation is proposed in this paper. The algorithm is based on Lookup Tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The(More)
Media signal processing requires high computing power and the algorithms exhibit a great deal of parallelism on low precision data. The basic components of multi-media objects are usually simple integers with 8, 12, or 16 bits of precision. In order to support efficient processing of media signals, Instructions Set Architecture (ISA) of the traditional(More)
This paper presents the design of a highly re-configurable adder, which has been optimized for speed and area. Since pass transistor based multiplexer is the fastest element in standard CMOS logic, we designed the adder using only multiplexers and 2-input inverted logic gates. This adder is the hybrid of binary carry lookahead adder of Brent, and carry(More)
1 ABSTRACT This paper presents design of an adder generator, for the production of area-time-optimal adders. A unique feature of the proposed generator is its integrated synthesis and layout environment achieved by providing relative placement information to the synthesis tool. Adders produced by this generator are dynamically configured for a given(More)
Advances in DRAM technology have led many researchers to integrate computational logic on DRAM chips to improve performance and reduce power dissipated across chip boundaries. The density, packaging, and storage characteristics of these intelligent memory chips, however, present n e w c hallenges in power management. We introduce Active Pages, a promising(More)