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A novel power efficient 0.64-GFlops fused 32-bit reversible floating point arithmetic unit architecture for digital signal processing applications
TLDR
A novel efficient reversible reversible floating point fused arithmetic unit architecture is proposed confirming to IEEE 754 standard. Expand
Design of an efficient reversible single precision floating point adder
TLDR
In this paper, it is proposed to present an efficient reversible single precision floating-point adder. Expand
Design of a reversible floating-point square root using modified non-restoring algorithm
TLDR
A reversible single precision floating-point square root is proposed using modified non-restoring algorithm using Reversible Controlled-Subtract-Multiplex. Expand
Transistor Representation of a Low-Power Reversible 32-Bit Comparator
TLDR
Two new 3 × 3 reversible gates are proposed and these are being used to realize the classical set of logic gates in the reversible domain. Expand
Design and implementation of efficient reversible even parity checker and generator
Communication in today's world is made efficient by digital data transmission. The digital communication employs parity generator at the source and parity checker at destination to ensure an errorExpand
Design of a Novel Reversible Full Adder and Reversible Full Subtractor
TLDR
Reversible computation plays an important role in the synthesis of circuits having application in quantum computing, low power CMOS design and nanotechnology based systems. Expand
An energy efficient Montgomery modular multiplier for security systems using reversible gates
TLDR
Mohaideen Abdul Kadar, Student is with Dept of Electronics & Communication Engineering, Pondicherry Engineering College Pillaichavady, Puducherry, (e-mail: mohaideENbtech@gmail.com) 978-1-4799-8081-9/15/$31. Expand
VLSI implementation of residue number system based efficient digital signal processor architecture for wireless sensor nodes
TLDR
Residue number system (RNS) in computer arithmetic is an efficient parallel computation number system that employs forward conversion, residue arithmetic based arithmetic manipulation and reverses conversion, which all together increases the speed of computation. Expand
DESIGN OF A REVERSIBLE FUSED 32-POINT RADIX -2 FLOATING POINT FFT UNIT USING 3:2 COMPRESSOR
TLDR
This paper aims on the design of a reversible fused 32Point Radix-2 single precision floating point FFT unit using 3:2 compressor with less quantum cost, less number of reversible gates and less constant inputs. Expand
Inspection of the surface of thin wires using laser scattering at oblique illumination
Conventional methods of estimating surface roughness have limited use in the case of thin wires. This paper discusses the use of laser scattering with oblique illumination to identify the region ofExpand
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