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Design of an efficient reversible single precision floating point adder
The proposed work focuses on improving the reversible designs of the normalisation unit including the design of the reversible leading zero detector, which is the most expensive part.
VLSI implementation of residue number system based efficient digital signal processor architecture for wireless sensor nodes
- A. V. AnanthaLakshmi, P. Rajagopalan
- Computer ScienceInternational Journal of Information Technology
- 1 December 2019
This work focuses on the design and implementation of power efficient RNS based digital signal processor architecture using folded tree based parallel prefix adder by employing Chinese Remainder Theorem.
Design of a Novel Reversible Full Adder and Reversible Full Subtractor
In this work, the proposed reversible full adder and reversible full subtractor is better than the existing counterparts in terms of number of reversible gates, and critical path delay.
Design and implementation of efficient reversible even parity checker and generator
- S. Gayathri, A. V. AnanthaLakshmi
- Computer ScienceInternational Conference on Science Engineering…
- 1 November 2014
The proposed 3-bit reversible even parity checker and generator circuit is designed using the existing basic reversible gates like Feynman gate, Toffoli gate, Peres gate and New gate and the performance of the designed parity checkers and generator is discussed.
A novel power efficient 0.64-GFlops fused 32-bit reversible floating point arithmetic unit architecture for digital signal processing applications
Transistor Representation of a Low-Power Reversible 32-Bit Comparator
Two new 3 × 3 reversible gates are proposed and these are being used to realize the classical set of logic gates in the reversible domain and an important aspect of the two newly proposed reversible gates is that a novel optimized 1-bit comparator can be realized.
Design of a reversible floating-point square root using modified non-restoring algorithm
An energy efficient Montgomery modular multiplier for security systems using reversible gates
- M. Kadar, A. V. AnanthaLakshmi
- Computer ScienceInternational Conference on Communications and…
- 2 April 2015
Reversible logic has gained much interest in recent years due to its ability in preserving the information without any energy loss, and Montgomery modular multiplier designed using reversible logic gates gives better energy efficiency.
DESIGN OF A REVERSIBLE FUSED 32-POINT RADIX -2 FLOATING POINT FFT UNIT USING 3:2 COMPRESSOR
This paper aims on the design of a reversible fused 32Point Radix-2 single precision floating point FFT unit using 3:2 compressor, which consumes less number of resources, operates at a slightly greater speed and dissipates less power when compared with the reversible discrete 32-Point RadIX-2 floating Point FFT Unit.
Inspection of the surface of thin wires using laser scattering at oblique illumination
Conventional methods of estimating surface roughness have limited use in the case of thin wires. This paper discusses the use of laser scattering with oblique illumination to identify the region of…