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Model checking lots of systems: efficient verification of temporal properties in software product lines
TLDR
In product line engineering, systems are developed in families and differences between family members are expressed in terms of features. Expand
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Featured Transition Systems: Foundations for Verifying Variability-Intensive Systems and Their Application to LTL Model Checking
TLDR
We propose an efficient automata-based approach to linear time logic (LTL) model checking of variability-intensive systems. Expand
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Symbolic model checking of software product lines
TLDR
We study the problem of model checking software product line (SPL) behaviours against temporal properties. Expand
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A text-based approach to feature modelling: Syntax and semantics of TVL
TLDR
In the scientific community, feature models are the de-facto standard for representing variability in software product line engineering. Expand
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Model checking software product lines with SNIP
TLDR
We present SNIP, an efficient model checker for software product lines (SPLs) that can be used outside the academic arena. Expand
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What's in a Feature: A Requirements Engineering Perspective
TLDR
In this paper, we attempt to clarify the notion of feature in the light of Zave and Jackson's framework for Requirements Engineering. Expand
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Introducing TVL, a Text-based Feature Modelling Language
TLDR
We present TVL, a text-based feature modelling notation that is both light and comprehensive, meaning that it covers most constructs of existing languages. Expand
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A formal semantics for feature cardinalities in feature diagrams
TLDR
This paper presents an extension of an earlier formal semantics of feature diagrams by adding support for feature cardinalities. Expand
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Model Checking Adaptive Software with Featured Transition Systems
TLDR
We propose to see adaptive systems as systems with highly dynamic features. Expand
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ProVeLines: a product line of verifiers for software product lines
TLDR
We present ProVeLines, a product line of verifiers for Software Product Lines (SPLs) that incorporates the results of over three years of research on formal verification of SPLs. Expand
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