A Kuncheva

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This paper describes steps involved in a new VHDL design of a decimation filter for a sigma-delta (/spl sigma//spl Delta/) modulator. Parameters of decimation filter are derived from the specifications of the overall /spl sigma//spl Delta/ modulator. Using Matlab and MathCAD tool it is possible to find the filter order, the required quantization level for(More)
This paper describes steps involved in a VHDL design of digital decimation filter for multibit sigma-delta (SigmaDelta) modulator. Parameters of decimation filter are derived from the specification of the multibit SigmaDelta modulator with two-step quantization architecture. Using Matlab tool it is possible to find the filter order, the required(More)
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