A. J. Annema

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This paper presents a monolithic optical detector, consisting of an integrated photodiode and a preamplifier in a standard 0.18-/spl mu/m CMOS technology. A data rate of 3 Gb/s at BER <10/sup -11/ was achieved for /spl lambda/=850 nm with 25-/spl mu/W peak-peak optical power. This data rate is more than four times than that of current state-of-the-art(More)
  • A. J. Annema
  • Proceedings of the 24th European Solid-State…
  • 1998
This paper describes two CMOS bandgap-reference circuits featuring Dynamic-Threshold MOS transistors. The first bandgap reference circuit aims at application in low-voltage low-power ICs that tolerate medium accuracy. The circuit's accuracy is 2% and it runs at supply voltages down to 0.85V while consuming only 1.2&#181;W; the die area is(More)
Modern and future ultra-deep-submicron (UDSM) technologies introduce several new problems in analog design. Nonlinear output conductance in combination with reduced voltage gain pose limits in linearity of (feedback) circuits. Gate-leakage mismatch exceeds conventional matching tolerances. Increasing area does not improve matching any more, except if higher(More)
A negative impedance is used to enable distortion cancellation between the transconductor and the cascode transistor for LNAs with a cascode topology. As a proof of concept, a resistive feedback LNA using this IM3 cancellation technique in a standard 0.16&#x03BC;m CMOS process shows that for 0.1GHz to 1GHz, improvements of 6.3dB to 10dB for IIP3 and 0.2dB(More)
The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS(More)
CMOS evolution introduces several problems in analog design. Gate-leakage mismatch exceeds conventional matching tolerances requiring active cancellation techniques or alternative architectures. One strategy to deal with the use of lower supply voltages is to operate critical parts at higher supply voltages, by exploiting combinations of thin- and(More)
An 8-10 GHz X-band upconversion quadrature mixer stage implemented in 250 nm SiGe BiCMOS is presented. Orthogonality of the spurious responses caused by clock feed through, I/Q mismatch and baseband harmonics after self-mixing was exploited to realize a baseband calibration scheme reducing all in-band spurs down to below -73dBc, for baseband signals up to a(More)
This paper introduces a recursive multibit /spl Sigma//spl Delta/ architecture that enables a high effective quantizer resolution while needing only a limited number of DAC elements. The recursive architecture consists of a set of /spl Sigma//spl Delta/ modulators, whereby each stage cancels the quantization noise of the proceeding stage. Conventional DEM(More)
An 8-bit 360<sup>o</sup> sawtooth modulated phase shifter is used to apply very small frequency offsets to RF signals between 7 and 8 GHz. Offsets between 6 Hz and 10MHz can be obtained. Such frequency offsets can be used to generate orthogonal signals, which are required in e.g. MIMO applications. Each undesired frequency component is suppressed to below(More)