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This work compares two fault tolerance techniques, Hamming code and Triple Modular Redundancy (TMR), that are largely used to mitigate Single Event Upsets in integrated circuits, in terms of area and performance penalty. Both techniques were implemented in VHDL and tested in two target applications: arithmetic circuits with pipeline and registers files.(More)
In this paper, an analytical method for predicting the 3D flux density distribution in the air gap of an electromagnetic planar actuator the propulsion planar force was developed. the planar actuator has a mover with two NdFeB-type permanent magnets and a stator covered by two multiphase orthogonal armature coils.
This paper presents an MPEG-4 AAC decoder described in VHDL language and compliant with the Brazilian Digital Television standard (SBTVD). It has been synthesized to an Altera Cyclone II 2C35 FPGA using 26549 logic elements and 248704 memory bits. The implemented architecture has been verified using an Altera DE2 prototyping board, being capable of decoding(More)
Simulating the muscular system has many applications in biomechanics, biomedicine and the study of movement in general. We are interested in studying the genesis of a very common pathology: human inguinal hernia. We study the effects that some biomechanical parameters have on the dynamic simulation of the region, and their involvement in the genesis of(More)
This paper describes the implementation of a white noise generator to be used as the input signal of a new method for testing analog-to-digital converters in order to detect and to evaluate integral and differential non-linearity errors. The main goal of this method is to avoidthe comparison of the analog-to-digital output with a known and very precise(More)
This paper presents a method to increase the observability of analog circuits through the use of a statistical sampler. This sampler acquires statistical properties of the input signal. Its main advantages are simplicity, low analog area overhead and suitability to multi-channel acquisition, as only one bit samplers are used. This qualifies it for use in a(More)
In this paper a video processing architecture for use in a set top box (STB) compatible with the Brazilian Digital Television System (SBTVD) is presented. After the decoding process, a video frame is stored in the STB memory and is scanned by the output subsystem while executing several operations in order to fit the external display. The paper discusses(More)
In this work the analysis and implementation of an electrical power measurement device using stochastic arithmetic techniques is presented. The device was implemented using programmable logic and a 2-channel AD converter. Simulations and real measurements wereobtained in order to characterize the system. This paper presents a comparison between the(More)
In this work a low cost approach for the generation of RF test signals for analog BIST is proposed. As a single bit signal is generated and applied to the RF path, only a single bit DA converter is needed. The approach takes advantage of the limited bandwidth in RF signal paths. Analysis of the proposed technique and comparison to other approaches are(More)
Multimedia systems need each time more video quality in order to respond new demands of video conferencing, digital TV, video storage, etc. At the same time and conflictingly, the need of better network/bandwidth utilization increases. To answer both demands,H.264-AVC was developed. This new video coding standard, accepted internationally, has a huge(More)